1. Field of the Invention
The present invention relates to fault analysis of semiconductor integrated circuits. In particular, it is related to a method of detecting faults, which automatically classifies fault patterns from the tester information, and an equipment therefore.
2. Description of the Related Art
Recently, due to the scaling down of semiconductor devices, various processed-based faults have emerged. Results obtained from wafer testing, performed immediately after completion of wafer processing, can be used in process improvement strategy. For example, in the case of DRAM, the tester information can be represented upon the surface of a wafer as a mapping display (fail bit map). The tester information represents the position of fail bits. A determination is then made whether there exists a fault pattern particular to the semiconductor manufacturing equipment according to the distribution of fail bits. This determination has come to be performed by a person directly observing the fail bit map. Not only is this situation left wanting in terms of objectivity and quantitativity, it is difficult to check all of a mass-produced product.
Therefore, attempts have been made to perform this determination automatically with a computer. A fail bit map is input to a computer as an image or numeric data. The computer then automatically determines whether the fail bit distribution is singular (a single bit fault), line-shaped (a column or row), cross-shaped or planar-shaped. In addition, a computer is used to determine distribution within the wafer surface (e.g. center, on the orientation flat side).
There are many cases where fault patterns auto-detected in such a manner are included in the category of basic elements of fault patterns. In other words, in order to specify the manufacturing equipment responsible for a fault, the basic elements of a fault pattern must be compared with a historical database, or they must be compared with the fault patterns that emanate from a manufacturing equipment by human determination.
However, sensitivity is low with mere extraction of the basic elements of the fault pattern. In addition, if a fault pattern does not manifest the fact that yield is decreased, it means that it may be impossible to locate a manufacturing equipment that is causing the fault pattern to occur.
In addition, in the case where an automated extraction system is configured using a computer, fault patterns not presupposed can not be auto detected.